update to glibc-2.28-251.2.src.rpm
Signed-off-by: Zhao Hang <wb-zh951434@alibaba-inc.com>
This commit is contained in:
Zhao Hang
parent
e44d0a27bf
commit
bd4ad22e2b
160 changed files with 43782 additions and 39677 deletions
265
glibc-RHEL-15696-41.patch
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265
glibc-RHEL-15696-41.patch
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From f53790272ce7bdc5ecd14b45f65d0464d2a61a3a Mon Sep 17 00:00:00 2001
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From: Noah Goldstein <goldstein.w.n@gmail.com>
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Date: Mon, 19 Apr 2021 17:48:10 -0400
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Subject: [PATCH] x86: Optimize less_vec evex and avx512
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memset-vec-unaligned-erms.S
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Content-type: text/plain; charset=UTF-8
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No bug. This commit adds optimized cased for less_vec memset case that
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uses the avx512vl/avx512bw mask store avoiding the excessive
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branches. test-memset and test-wmemset are passing.
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Signed-off-by: Noah Goldstein <goldstein.w.n@gmail.com>
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---
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sysdeps/x86_64/multiarch/ifunc-impl-list.c | 40 ++++++++++-----
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sysdeps/x86_64/multiarch/ifunc-memset.h | 6 ++-
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.../multiarch/memset-avx512-unaligned-erms.S | 2 +-
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.../multiarch/memset-evex-unaligned-erms.S | 2 +-
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.../multiarch/memset-vec-unaligned-erms.S | 51 +++++++++++++++----
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5 files changed, 74 insertions(+), 27 deletions(-)
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diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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index 85b8863a..d59d65f8 100644
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--- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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+++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
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@@ -204,19 +204,23 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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__memset_chk_avx2_unaligned_erms_rtm)
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IFUNC_IMPL_ADD (array, i, __memset_chk,
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(CPU_FEATURE_USABLE (AVX512VL)
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- && CPU_FEATURE_USABLE (AVX512BW)),
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__memset_chk_evex_unaligned)
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IFUNC_IMPL_ADD (array, i, __memset_chk,
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(CPU_FEATURE_USABLE (AVX512VL)
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- && CPU_FEATURE_USABLE (AVX512BW)),
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__memset_chk_evex_unaligned_erms)
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IFUNC_IMPL_ADD (array, i, __memset_chk,
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(CPU_FEATURE_USABLE (AVX512VL)
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- && CPU_FEATURE_USABLE (AVX512BW)),
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__memset_chk_avx512_unaligned_erms)
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IFUNC_IMPL_ADD (array, i, __memset_chk,
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(CPU_FEATURE_USABLE (AVX512VL)
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- && CPU_FEATURE_USABLE (AVX512BW)),
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__memset_chk_avx512_unaligned)
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IFUNC_IMPL_ADD (array, i, __memset_chk,
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CPU_FEATURE_USABLE (AVX512F),
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@@ -247,19 +251,23 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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__memset_avx2_unaligned_erms_rtm)
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IFUNC_IMPL_ADD (array, i, memset,
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(CPU_FEATURE_USABLE (AVX512VL)
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- && CPU_FEATURE_USABLE (AVX512BW)),
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__memset_evex_unaligned)
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IFUNC_IMPL_ADD (array, i, memset,
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(CPU_FEATURE_USABLE (AVX512VL)
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- && CPU_FEATURE_USABLE (AVX512BW)),
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__memset_evex_unaligned_erms)
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IFUNC_IMPL_ADD (array, i, memset,
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(CPU_FEATURE_USABLE (AVX512VL)
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- && CPU_FEATURE_USABLE (AVX512BW)),
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__memset_avx512_unaligned_erms)
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IFUNC_IMPL_ADD (array, i, memset,
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(CPU_FEATURE_USABLE (AVX512VL)
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- && CPU_FEATURE_USABLE (AVX512BW)),
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__memset_avx512_unaligned)
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IFUNC_IMPL_ADD (array, i, memset,
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CPU_FEATURE_USABLE (AVX512F),
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@@ -739,10 +747,14 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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&& CPU_FEATURE_USABLE (RTM)),
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__wmemset_avx2_unaligned_rtm)
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IFUNC_IMPL_ADD (array, i, wmemset,
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- CPU_FEATURE_USABLE (AVX512VL),
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__wmemset_evex_unaligned)
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IFUNC_IMPL_ADD (array, i, wmemset,
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- CPU_FEATURE_USABLE (AVX512VL),
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__wmemset_avx512_unaligned))
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#ifdef SHARED
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@@ -946,10 +958,14 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
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CPU_FEATURE_USABLE (AVX2),
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__wmemset_chk_avx2_unaligned)
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IFUNC_IMPL_ADD (array, i, __wmemset_chk,
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- CPU_FEATURE_USABLE (AVX512VL),
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__wmemset_chk_evex_unaligned)
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IFUNC_IMPL_ADD (array, i, __wmemset_chk,
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- CPU_FEATURE_USABLE (AVX512F),
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+ (CPU_FEATURE_USABLE (AVX512VL)
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+ && CPU_FEATURE_USABLE (AVX512BW)
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+ && CPU_FEATURE_USABLE (BMI2)),
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__wmemset_chk_avx512_unaligned))
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#endif
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diff --git a/sysdeps/x86_64/multiarch/ifunc-memset.h b/sysdeps/x86_64/multiarch/ifunc-memset.h
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index 19795938..100e3707 100644
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--- a/sysdeps/x86_64/multiarch/ifunc-memset.h
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+++ b/sysdeps/x86_64/multiarch/ifunc-memset.h
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@@ -54,7 +54,8 @@ IFUNC_SELECTOR (void)
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&& !CPU_FEATURES_ARCH_P (cpu_features, Prefer_No_AVX512))
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{
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if (CPU_FEATURE_USABLE_P (cpu_features, AVX512VL)
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- && CPU_FEATURE_USABLE_P (cpu_features, AVX512BW))
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+ && CPU_FEATURE_USABLE_P (cpu_features, AVX512BW)
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+ && CPU_FEATURE_USABLE_P (cpu_features, BMI2))
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{
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if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
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return OPTIMIZE (avx512_unaligned_erms);
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@@ -68,7 +69,8 @@ IFUNC_SELECTOR (void)
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if (CPU_FEATURE_USABLE_P (cpu_features, AVX2))
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{
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if (CPU_FEATURE_USABLE_P (cpu_features, AVX512VL)
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- && CPU_FEATURE_USABLE_P (cpu_features, AVX512BW))
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+ && CPU_FEATURE_USABLE_P (cpu_features, AVX512BW)
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+ && CPU_FEATURE_USABLE_P (cpu_features, BMI2))
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{
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if (CPU_FEATURE_USABLE_P (cpu_features, ERMS))
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return OPTIMIZE (evex_unaligned_erms);
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diff --git a/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S
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index 22e7b187..8ad842fc 100644
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--- a/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S
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+++ b/sysdeps/x86_64/multiarch/memset-avx512-unaligned-erms.S
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@@ -19,6 +19,6 @@
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# define SECTION(p) p##.evex512
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# define MEMSET_SYMBOL(p,s) p##_avx512_##s
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# define WMEMSET_SYMBOL(p,s) p##_avx512_##s
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-
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+# define USE_LESS_VEC_MASK_STORE 1
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# include "memset-vec-unaligned-erms.S"
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#endif
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diff --git a/sysdeps/x86_64/multiarch/memset-evex-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-evex-unaligned-erms.S
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index ae0a4d6e..640f0929 100644
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--- a/sysdeps/x86_64/multiarch/memset-evex-unaligned-erms.S
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+++ b/sysdeps/x86_64/multiarch/memset-evex-unaligned-erms.S
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@@ -19,6 +19,6 @@
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# define SECTION(p) p##.evex
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# define MEMSET_SYMBOL(p,s) p##_evex_##s
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# define WMEMSET_SYMBOL(p,s) p##_evex_##s
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-
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+# define USE_LESS_VEC_MASK_STORE 1
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# include "memset-vec-unaligned-erms.S"
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#endif
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diff --git a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
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index bae5cba4..f877ac9d 100644
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--- a/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
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+++ b/sysdeps/x86_64/multiarch/memset-vec-unaligned-erms.S
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@@ -63,6 +63,8 @@
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# endif
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#endif
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+#define PAGE_SIZE 4096
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+
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#ifndef SECTION
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# error SECTION is not defined!
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#endif
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@@ -213,11 +215,38 @@ L(loop):
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cmpq %rcx, %rdx
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jne L(loop)
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VZEROUPPER_SHORT_RETURN
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+
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+ .p2align 4
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L(less_vec):
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/* Less than 1 VEC. */
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# if VEC_SIZE != 16 && VEC_SIZE != 32 && VEC_SIZE != 64
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# error Unsupported VEC_SIZE!
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# endif
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+# ifdef USE_LESS_VEC_MASK_STORE
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+ /* Clear high bits from edi. Only keeping bits relevant to page
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+ cross check. Note that we are using rax which is set in
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+ MEMSET_VDUP_TO_VEC0_AND_SET_RETURN as ptr from here on out.
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+ */
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+ andl $(PAGE_SIZE - 1), %edi
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+ /* Check if VEC_SIZE store cross page. Mask stores suffer serious
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+ performance degradation when it has to fault supress. */
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+ cmpl $(PAGE_SIZE - VEC_SIZE), %edi
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+ ja L(cross_page)
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+# if VEC_SIZE > 32
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+ movq $-1, %rcx
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+ bzhiq %rdx, %rcx, %rcx
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+ kmovq %rcx, %k1
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+# else
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+ movl $-1, %ecx
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+ bzhil %edx, %ecx, %ecx
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+ kmovd %ecx, %k1
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+# endif
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+ vmovdqu8 %VEC(0), (%rax) {%k1}
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+ VZEROUPPER_RETURN
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+
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+ .p2align 4
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+L(cross_page):
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+# endif
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# if VEC_SIZE > 32
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cmpb $32, %dl
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jae L(between_32_63)
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@@ -234,36 +263,36 @@ L(less_vec):
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cmpb $1, %dl
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ja L(between_2_3)
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jb 1f
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- movb %cl, (%rdi)
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+ movb %cl, (%rax)
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1:
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VZEROUPPER_RETURN
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# if VEC_SIZE > 32
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/* From 32 to 63. No branch when size == 32. */
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L(between_32_63):
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- VMOVU %YMM0, -32(%rdi,%rdx)
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- VMOVU %YMM0, (%rdi)
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+ VMOVU %YMM0, -32(%rax,%rdx)
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+ VMOVU %YMM0, (%rax)
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VZEROUPPER_RETURN
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# endif
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# if VEC_SIZE > 16
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/* From 16 to 31. No branch when size == 16. */
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L(between_16_31):
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- VMOVU %XMM0, -16(%rdi,%rdx)
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- VMOVU %XMM0, (%rdi)
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+ VMOVU %XMM0, -16(%rax,%rdx)
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+ VMOVU %XMM0, (%rax)
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VZEROUPPER_RETURN
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# endif
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/* From 8 to 15. No branch when size == 8. */
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L(between_8_15):
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- movq %rcx, -8(%rdi,%rdx)
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- movq %rcx, (%rdi)
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+ movq %rcx, -8(%rax,%rdx)
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+ movq %rcx, (%rax)
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VZEROUPPER_RETURN
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L(between_4_7):
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/* From 4 to 7. No branch when size == 4. */
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- movl %ecx, -4(%rdi,%rdx)
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- movl %ecx, (%rdi)
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+ movl %ecx, -4(%rax,%rdx)
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+ movl %ecx, (%rax)
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VZEROUPPER_RETURN
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L(between_2_3):
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/* From 2 to 3. No branch when size == 2. */
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- movw %cx, -2(%rdi,%rdx)
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- movw %cx, (%rdi)
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+ movw %cx, -2(%rax,%rdx)
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+ movw %cx, (%rax)
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VZEROUPPER_RETURN
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END (MEMSET_SYMBOL (__memset, unaligned_erms))
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--
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